IC Resources logo

Design Verification Engineer

IC Resources
Department:Design
Type:HYBRID
Region:Edinburgh, Scotland
Location:Edinburgh, Scotland, United Kingdom
Experience:Mid-Senior level
Estimated Salary:£50,000 - £80,000
Skills:
SYSTEMVERILOGUVMSVAVERIFICATION PLANNINGFUNCTIONAL COVERAGECODE COVERAGECONSTRAINT-RANDOM VERIFICATIONTCLPERLPOWER-AWARE VERIFICATIONCPFUPFFORMAL VERIFICATION
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Job Description

Posted on: June 6, 2026

Location: Edinburgh Working Model: Hybrid (2+ days per week in the office) Relocation & Visa Sponsorship: Available if required This is a fantastic opportunity to join a well-established semiconductor company as they continue to grow their multi-disciplinary Verification team. The group has ambitious expansion plans and is seeking Verification Engineers to work on complex technical challenges, delivering innovative end-user solutions for leading global consumer brands. The role As a Design Verification Engineer, you will be involved in all aspects of digital verification for complete mixed-signal IC developments. You will work on sophisticated verification environments and actively contribute to the ongoing improvement of verification methodologies. This is an excellent opportunity to become deeply involved in cutting-edge projects within a global organisation. In return, the company offers a strong benefits package, including personal and professional development, a uniquely flat culture, and a competitive compensation package including RSUs. Career progressionResponsibilities The team is hiring across multiple levels, from Mid-Level through to Staff. More senior engineers will have opportunities to take on additional responsibilities, such as:

  • Supporting and mentoring junior engineers
  • Driving improvements in verification methodologies
  • Leading verification activities for larger or more complex projects

Required Skills & Experience

  • Metric-driven verification, including:
  • Verification planning
  • Requirements extraction
  • Directed and constrained-random verification
  • Functional and code coverage analysis
  • Strong SystemVerilog, including SVA (SystemVerilog Assertions)
  • Testbench development using verification frameworks (e.g. UVM)
  • Strong debugging skills
  • Scripting experience with TCL or Perl
  • Power-aware verification using CPF/UPF
  • Formal verification and verification qualification techniques (nice to have)

This is a truly superb opportunity to join a growing business based in refurbished, central Edinburgh offices, working on challenging and rewarding technology. For more information, please contact Rachel Mason at IC Resources.

Originally posted on LinkedIn

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